Distributed control for thermoelastic disturbance rejection in optical lithography systems


Staff Mentor:

prof.dr.ir. M. Verhaegen (Michel)


Other Mentor(s):

MSc. Ruxandra Mustata

Keywords:

Adaptive and learning control; Distributed and large-scale systems

Description:

Considering the International Technology Roadmap for Semiconductors (ITRS) [1], the trend in the semiconductor industry is to constantly reduce the nanometer-scale critical dimensions of the features used in fabricating integrated circuits (IC). Optical lithography is seen as the crucial step for resolution enhancement in the ICs production process. The principle of photolithography consists in transferring the geometrical pattern from a photomask to a photoresist, by photomask illumination. Different sources of disturbance along the optical path lead to unconformity between the projected image and the wafer surface topology. The illumination scanning is one important performance limiting factor which dynamically contributes to the image unconformity at the wafer plane is. We are interested in compensating for the local heating-induced wafer deformations that occur around the focal point during the wafer illumination.

The challenge of this MSc thesis is to develop an integrated thermo-mechanical model of the wafer deformations and the heating-induced disturbance. The model is intended for the new class of distributed control methodologies developed at the Delft Center of Technology [2]. First, the use of thermoelastic models for in-plane and out-of-plane wafer deformations due to external forces and thermal loads will be investigated. Then, the model will be augmented with a distributed actuation and sensing concept at the wafer stage. Finally, additional prior knowledge about the wafer scanning path will be used for designing a distributed predictive controller for heating-induced disturbance rejection. It is expected that the above approach will contribute to the development of novel technologies in optical lithography that meet future requirements of sub-50 nanometer level feature size.

[1] International Technology Roadmap for Semiconductors [Online] http://www.itrs.net/.

[2] J. Rice and M. Verhaegen. “Distributed control: A sequentially semi-separable approach for heterogeneous linear systems”, IEEE Trans. Automat. Control, Vol. 54, No. 6, pages 1270-83, 2009.



Figure 1. The ASML�s new generation TWINSCAN NXT:1950i Step-and-scan lithography system, designed for semiconductor manufacturing at the 32-nm node and below. (Courtesy: ASML, http://www.asml.com/asml/show.do?lang=EN&ctx=6720&rid=36951)

© Copyright Delft Center for Systems and Control, Delft University of Technology, 2017.